With the growth of wireless communication systems such as cellular, wireless local area networks (WLAN), satellite communications, the global positioning system (GPS), and the like, demands for smaller size, lower cost, and higher frequency products have continuously increased. In this regard, voltage controlled oscillators (VCOs) play a critical role in communication systems, providing periodic signals required for timing in digital circuits and frequency translation in radio frequency (RF) circuits. A VCO may be embodied as a stand-alone module separate from other circuits or integrated into an application specific integrated circuit (ASIC), for use in devices such as, but not limited to, handsets, base stations, and virtually every communication device. As RF frequencies increase and supply voltages decrease, it has become increasingly more difficult to design VCOs that meet system noise and power requirements while meeting the demands for smaller size, lower cost, and higher frequency products.
The noise performance of a LC resonant VCO is directly related to its signal power, which is proportional to the energy stored in the resonant inductor-capacitor (LC) tank circuit. In traditional VCO designs, the energy stored in the LC circuit is proportional to the size of the inductor and the square of the supply voltage for the amplifier in the VCO.
As semiconductor device geometries shrink, the supply voltage for the amplifier is required to decrease to avoid hot carrier injection (HCI). HCI is a phenomenon wherein charge carriers become trapped in the gate dielectric of a MOS transistor and permanently change its switching characteristics.
To compensate for the decrease in voltage, the inductor used in the LC tank circuit must also decrease in size so that the resulting noise performance of the VCO remains the same. Increases in required frequency also require the inductor size to be decreased. The decrease in inductor size presents a challenge since as an inductor gets smaller in size, its quality factor (Q) decreases as well, further increasing the thermal noise of the VCO.
A so-called Hartley VCO is an active circuit comprising an amplifier, capacitor(s), and inductors. A characteristic of the Hartley VCO is a tuned circuit comprising capacitor(s) in parallel with two or more inductors in series, and a feedback signal for oscillation taken from a connection in between the inductors.
Referring now to FIG. 1, a schematic is illustrated of a prior art differential Harley VCO 100 employing a conventional LC tank circuit resonator. Transistors M1-M4 form an amplifier. PMOS transistors M3 and M4 have their sources coupled to the positive supply rail (e.g. VDD), and their respective gates cross coupled to the drains of the opposing PMOS transistor and to the sources of PMOS transistors M1 and M2, respectively. PMOS transistors M1 and M2 have their drains coupled to the negative supply rail (e.g. ground), and their respective gates coupled to the conventional LC tank resonator formed with inductors L1 and L2 and capacitors Cv.
FIG. 2 illustrates a prior art layout for tapped inductors L1 and L2 schematically depicted in FIG. 1. In FIG. 2, the inductors L1 and L2 are shown as nested loops 201-202. The nesting provides the mutual couplings k1 and k2 shown in FIG. 1.
FIG. 3A illustrates a schematic diagram of a prior art simplified differential Harley VCO circuit employing a conventional LC tank circuit resonator. FIG. 3B illustrates a simplified schematic diagram of the small signal half circuit resonator of the circuit in FIG. 3A.
FIG. 4 illustrates an integrated circuit die for the circuit depicted in FIGS. 3A and 3B including the prior art layout for the tapped inductors. In FIG. 4, the inductor elements L1 and L2 are shown as nested loops 401-402. The nesting provides the mutual coupling K shown in FIG. 3A. Inductive elements L3 and L4 in FIG. 3A are shown as separate loops 403-404 in FIG. 4.
In the prior art layouts depicted in FIG. 2 or 4, separate loops (e.g., loops 201-202 and loops 401-402) are utilized for inductances L1 and L2. These separate loops put physical limits on how small an inductor element can be used in a Hartley VCO design. For example, because of the inductor topology, the minimum to maximum frequency range of the VCO circuits depicted in FIGS. 1 and 3 is on the order of ten to fifteen percent due to the parasitic capacitance associated with the large physical inductances.